Astera Labs — AI supply-chain exposure

Astera Labs designs the connectivity silicon that keeps data moving cleanly inside an AI rack. Its retimers, SerDes and fabric controllers sit on the copper and optical links that lash many accelerators into one system, refreshing signals so they survive the trip between chips. It builds none of the compute itself; it lives in the infrastructure layer, on the scale-up and scale-out fabric that surrounds the GPUs.

As frontier models are split across ever more accelerators, the interconnect — not any single chip — becomes the thing that has to keep pace. Every new accelerator generation runs its links faster and packs systems denser, and the fabric silicon has to be requalified alongside it. That places Astera on a link that tightens exactly as build-outs grow, giving it exposure tied to how large and how tightly coupled these machines become.